HEF4794BP,112

HEF4794BP,112 2. Features and benefits

•Wide supply voltage range from 3.0 V to 15.0 V •CMOS low power dissipation •High noise immunity •Fully static operation •5 V, 10 V, and 15 V parametric ratings •Standardized symmetrical output characteristics •Complies with JEDEC standard JESD 13-B •ESD protection: •HBM JESD22-A114F exceeds 2000 V •MM JESD22-A115-A exceeds 200 V •Specified from -40 °C to +85 °C and -40 °C to +125 °C

HEF4794BP,112 1. General description

The HEF4794B is an 8-stage serial shift register. It has a storage latch associated with eachstage for strobing data from the serial input (D) to the parallel LED driver outputs (QP0 to QP7).Data is shifted on the positive-going clock (CP) transitions. The data in each shift register stageis transferred to the storage register when the strobe input (STR) is HIGH. Data in the storageregister appears at the outputs whenever the output enable input (OE) signal is HIGH.Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4794B devices.Serial data is available at QS1 on positive-going clock edges to allow high-speed operation incascaded systems with a fast clock rise time. The same serial data is available at QS2 on the nextnegative going clock edge. This is used for cascading HEF4794B devices when the clock has aslow rise time.It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usuallyground). Unused inputs must be connected to VDD, VSS, or another input.

HEF4794BP,112 5.2. Pin description

Table 2. Pin descriptionSymbolPinDescriptionD2serial inputQP0 to QP74, 5, 6, 7, 14, 13, 12, 11parallel output (open-drain)QS19serial outputQS210serial outputCP3clock inputSTR1strobe inputOE15output enable inputVDD16supply voltageVSS8ground (0 V)HEF4794BAll information provided in this document is subject to legal disclaimers.© Nexperia B.V. 2022. All rights reservedProduct data sheetRev. 10 — 6 January 20223 / 14