DS90340I-PCX

DS90340I-PCX FEATURES

Integrated NV SRAM, Real-Time Clock,Crystal, Power-Fail Control Circuit, andLithium Energy Source Clock Registers are Accessed Identically tothe Static RAM. These Registers Reside inthe Eight Top RAM Locations. Century Byte Register Totally Nonvolatile with Over 10 Years ofOperation in the Absence of Power BCD-Coded Century, Year, Month, Date,Day, Hours, Minutes, and Seconds withAutomatic Leap Year Compensation Validthrough 2099 Low-Battery-Voltage Level Indicator Flag Power-Fail Write Protection Allows for ±10%VCC Power-Supply Tolerance Lithium Energy Source is ElectricallyDisconnected to Retain Freshness UntilPower is Applied for the First Time DIP Module OnlyStandard JEDEC Bytewide 8k x 8 StaticRAM Pinout PowerCap Module Board OnlySurface-Mountable Package for DirectConnection to PowerCap ContainingBattery and CrystalReplaceable Battery (PowerCap)Power-On Reset OutputPin-for-Pin Compatible with Other Densitiesof DS174XP Timekeeping RAM Underwriters Laboratories (UL) Recognizedto Prevent Charging of the Internal LithiumBattery

DS90340I-PCX PIN DESCRIPTION

DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMsPINPDIP12345678910111213141516171819PowerCap1, 2, 3,31–3430252423222120191816151417131211109NAMEFUNCTIONN.C.No ConnectionAddress InputA12A7A6A5A4A3A2A1A0DQ0DQ1DQ2GND GroundDQ3DQ4DQ5DQ6DQ7Data Input/OutputData Input/OutputPINPDIPPowerCapNAMEFUNCTION202122232425262728———8287292726—654CEA10OEA11A9A8CE2WEVCCRSTX1, X2VBATChip Enable,Active LowAddress InputOutput Enable,Active LowAddress InputChip Enable 2Write Enable,Active LowPower-SupplyInputPower-On ResetOutput, ActiveLowCrystalConnectionBatteryConnection2 of 16

DS90340I-PCX for the system to stabilize. These features prevent loss of data from unpredictable system operation brought

DS90340I-PCX DESCRIPTION

The DS1743 is a full-function, year-2000-compliant (Y2KC), real-time clock/calendar (RTC) and 8k x 8nonvolatile static RAM. User access to all registers within the DS1743 is accomplished with a bytewideinterface as shown in Figure 1. The RTC information and control bits reside in the eight uppermost RAMlocations. The RTC registers contain century, year, month, date, day, hours, minutes, and seconds data in24-hour binary-coded decimal (BCD) format. Corrections for the day of the month and leap year are madeautomatically. The RTC clock registers are double buffered to avoid access of incorrect data that can occurduring clock update cycles. The double-buffered system also prevents time loss as the timekeepingcountdown continues unabated by access to time register data. The DS1743 also contains its own power-fail circuitry, which deselects the device when the VCC supply is in an out-of-tolerance condition. WhenVCC is above VPF, the device is fully accessible. When VCC is below VPF, the internal CE signal is forcedhigh, preventing any access. When VCC rises above VPF, access remains inhibited for TREC, allowing timefor the system to stabilize. These features prevent loss of data from unpredictable system operation broughton by low VCC as errant access and update cycles are avoided.3 of 16