EPXA4F672C2

EPXA4F672C2 Features...

leading programmable logic on a single deviceat up to 200 MHz– ARMv4T instruction set with Thumb® extensions– Memory management unit (MMU) included for real-timeoperating system (RTOS) support– Harvard cache architecture with 64-way set associative separate8-Kbyte instruction and 8-Kbyte data caches100,000 to 1,000,000 gates (see Table 1 on page 3)architecture (AMBA™) high-performance bus (AHB)ETM9 embedded trace module to assist software debuggingFlexible interrupt controller––– Universal asynchronous receiver/transmitter (UART)– General-purpose timer– Watchdog timer––––Internal single-port SRAM up to 256 KbytesInternal dual-port SRAM up to 128 KbytesInternal SDRAM controller---Expansion bus interface (EBI)-Single data-rate (SDR) and double data-rate (DDR) supportUp to 512 MbytesData rates to 133 (266) MHzCompatible with industry-standard flash memory, SRAMs,and peripheral devicesFour devices, each up to 32 Mbytes-processor softwareSignalTap™ embedded logic analyzer–– ARM® JTAG processor debug support––Real-time data/instruction processor traceBackground debug monitoring via the IEEE Std. 1149.1 (JTAG)interface