AD9860BSTRL

AD9860BSTRL FEATURES

Mixed-Signal Front-End Processor with Dual ConverterReceive and Dual Converter Transmit Signal Paths

AD9860BSTRL GENERAL DESCRIPTION

The AD9860 and AD9862 (AD9860/AD9862) are versatileintegrated mixed-signal front-ends (MxFE) that are optimizedfor broadband communication markets. The AD9860/AD9862are cost effective, mixed signal solutions for wireless or wirelinestandards based or proprietary broadband modem systems wheredynamic performance, power dissipation, cost, and size are allcritical attributes. The AD9860 has 10-bit ADCs and 12-bit DACs;the AD9862 has 12-bit ADCs and 14-bit DACs.The AD9860/AD9862 receive path (Rx) consists of two channelsthat each include a high performance, 10-/12-bit, 64 MSPS analog-to-digital converter (ADC), input buffer, Programmable GainAmplifier (RxPGA), digital Hilbert filter, and decimation filter. TheRx can be used to receive real, diversity, or I/Q data at baseband orlow IF. The input buffers provide a constant input impedance forboth channels to ease impedance matching with external com-ponents (e.g., SAW filter). The RxPGA provides a 20 dB gainrange for both channels. The output data bus can be multi-plexed to accommodate a variety of interface types.The AD9860/AD9862 transmit path (Tx) consists of two chan-nels that contain high performance, 12-/14-bit, 128 MSPSdigital-to-analog converters (DAC), programmable gain amplifiers(TxPGA), interpolation filters, a Hilbert filter, and digital mixersfor complex or real signal frequency modulation. The Tx latchand demultiplexer circuitry can process real or I/Q data. Interpo-lation rates of 2� and 4� are available to ease requirements onan external reconstruction filter. For single channel systems, thedigital Hilbert filter can be used with an external quadraturemodulator to create an image rejection architecture. The two12-/14-bit, high performance DACs produce an output signalthat can be scaled over a 20 dB range by the TxPGA.A programmable delay-locked loop (DLL) clock multiplier andintegrated timing circuits enable the use of a single externalreference clock or an external crystal to generate clocking for allinternal blocks and also provides two external clock outputs.Additional features include a programmable sigma-delta output,four auxiliary ADC inputs and three auxiliary DAC outputs.Device programmability is facilitated by a serial port interface(SPI) combined with a register bank. The AD9860/AD9862 isavailable in a space saving 128-lead LQFP.

AD9860BSTRL APPLICATIONS